Staff ASIC Digital Engineer (STA and Sign-Off)

This position is listed on behalf of a partner company, who manages all applications and next steps. Our partner is looking for a Staff ASIC Digital Engineer (STA and Sign-Off) based in India. This is an outstanding opportunity for an experienced semiconductor professional to lead Static Timing Analysis (STA) and sign-off activities for advanced ASIC designs. In this role, you will play a critical part in ensuring timing integrity, performance optimization, and successful tape-outs for complex digital products built on cutting-edge process technologies. Working in a highly collaborative engineering environment, you will partner with design, verification, physical design, and DFT teams to solve challenging technical problems and drive innovation in timing methodologies. The position offers significant technical ownership, exposure to advanced nodes, and the opportunity to shape best practices that influence next-generation storage and memory technologies.