This position is listed on behalf of a partner company, who manages all applications and next steps. Our partner is looking for a Senior DFT Engineer based in India. This is an opportunity to take ownership of Design-for-Test (DFT) implementation and verification for advanced SoC and ASIC designs.You’ll work on complex semiconductor architectures where test coverage, performance, power, and test time are critical design considerations.The role spans scan, ATPG, memory test, boundary scan, IJTAG, timing, verification, and silicon debug.You’ll collaborate closely with RTL, verification, physical design, and test engineering teams to solve challenging technical problems.The environment is fast-paced, highly technical, and focused on shipping real silicon rather than lengthy processes or bureaucracy.You’ll have meaningful ownership and the opportunity to contribute to products supporting the rapidly expanding AI and high-performance computing infrastructure market.