This position is listed on behalf of a partner company, who manages all applications and next steps. Our partner is looking for a Design Verification Lead based in India. This is a senior verification leadership opportunity focused on next-generation SoCs powering AI, HPC, and networking applications.You will define scalable verification architectures that span IP, subsystem, and full-chip levels while driving reuse across multiple silicon programs.The role combines deep hands-on expertise in SystemVerilog, UVM, coverage-driven verification, assertions, and Portable Stimulus with strong architectural leadership.You will champion automation, portability, and AI-driven verification techniques to accelerate testing, coverage closure, and debugging.Your work will directly contribute to first-pass silicon success, reduced verification cycles, and fewer post-silicon escapes.You’ll collaborate closely with architecture, design, physical design, and software teams in a fast-moving global engineering environment.This role is ideal for a technical leader who wants significant ownership over verification methodology, quality standards, and next-generation semiconductor development.